How to Calculate Thermal Resistance: Junction to Ambient
Understanding thermal resistance is fundamental to power electronics thermal design. Just as electrical resistance limits current flow, thermal resistance limits heat flow. By modeling the complete thermal path from semiconductor junction to ambient air as a network of thermal resistances, engineers can predict operating temperatures and identify design bottlenecks before building hardware.
The Thermal Resistance Concept
Thermal resistance (Rth) quantifies how difficult it is for heat to flow through a material or interface. The fundamental equation is Fourier's Law adapted for steady-state conduction:
Rth = ΔT / P
Where ΔT is the temperature difference (°C or K) and P is the power dissipated (W). The units are °C/W or K/W.
For conduction through a solid material:
Rth = L / (k × A)
Where L is the thickness (m), k is thermal conductivity (W/mK), and A is the cross-sectional area (m²).
This simple relationship allows us to calculate expected temperature rises for given power levels, or conversely, determine acceptable power levels for target temperatures.
Building the Thermal Network
A complete thermal path from semiconductor junction to ambient typically includes these resistances in series:
Rth_jc (Junction to Case): The thermal resistance from the semiconductor die to the bottom of the device package. This is specified in device datasheets and cannot be modified by the system designer.
Rth_cs (Case to Sink): The resistance across the thermal interface material between the device and heatsink. Depends on TIM thermal conductivity, thickness, and contact area.
Rth_sa (Sink to Ambient): The heatsink's ability to transfer heat to the surrounding air. Depends on heatsink design, airflow, and ambient conditions.
For series resistances, total Rth = Rth_jc + Rth_cs + Rth_sa
The junction temperature is then: Tj = Ta + P × Rth_total
Where Ta is ambient temperature and P is power dissipation.
Calculating Each Resistance
Junction-to-Case (Rth_jc): Read directly from device datasheet. For power MOSFETs, typical values range from 0.2-2.0°C/W. For large IGBT modules, values can be 0.01-0.1°C/W due to larger die area.
Case-to-Sink (Rth_cs): Calculate using: Rth_cs = t / (k × A)
Where t is TIM thickness, k is TIM thermal conductivity, and A is contact area. For a TO-247 package with 3 W/mK thermal pad at 0.25mm thickness: Rth_cs = 0.00025 / (3 × 0.0002) = 0.42°C/W
Sink-to-Ambient (Rth_sa): For forced convection: Rth_sa ≈ 1 / (h × A_fin) Where h is convective coefficient (50-150 W/m²K typical) and A_fin is total fin surface area.
For natural convection, use manufacturer's published curves or empirical correlations.
Worked Example
Let's calculate junction temperature for a 100W MOSFET:
Given:
- Power dissipation: P = 100W
- Ambient temperature: Ta = 40°C
- Maximum junction temperature: Tj_max = 150°C
- Rth_jc = 0.5°C/W (from datasheet)
- TIM: 3 W/mK pad, 0.3mm thick, 20mm × 20mm contact
- Heatsink: Rth_sa = 0.4°C/W at 2 m/s airflow
Calculate Rth_cs: A = 0.02 × 0.02 = 0.0004 m² Rth_cs = 0.0003 / (3 × 0.0004) = 0.25°C/W
Total thermal resistance: Rth_total = 0.5 + 0.25 + 0.4 = 1.15°C/W
Junction temperature: Tj = 40 + (100 × 1.15) = 155°C
This exceeds Tj_max! We need to either reduce Rth_sa (larger heatsink or more airflow) or reduce Rth_cs (better TIM or larger contact area).
Parallel Paths and Spreading Resistance
Real thermal networks often include parallel paths. When heat can flow through multiple paths simultaneously, combine resistances using:
1/Rth_parallel = 1/Rth_1 + 1/Rth_2 + ... + 1/Rth_n
Spreading Resistance: When a small heat source sits on a large heatsink base, heat must spread laterally before conducting through the base thickness. This spreading adds resistance not captured by simple 1D calculations.
Spreading resistance can add 0.1-0.5°C/W for typical configurations. Use CFD simulation or spreading resistance correlations when the heat source is significantly smaller than the heatsink base.
Multiple Heat Sources: When multiple devices share a heatsink, each device experiences not only its own heating but also heating from neighbors. The temperature at each device becomes:
T_i = Ta + Σ(P_j × Rth_ij)
Where Rth_ij is the thermal resistance from device j to device i (including spreading effects).
Design Guidelines and Optimization
Identify the Limiting Resistance: Calculate each resistance in the chain. The largest resistance offers the best improvement opportunity. In many designs, Rth_cs (the interface) is overlooked but can be the dominant resistance.
Design Margins: Never design to exactly hit Tj_max. Apply derating:
- Consumer products: Design for Tj ≤ 0.8 × Tj_max
- Industrial: Design for Tj ≤ 0.7 × Tj_max
- Automotive/military: Design for Tj ≤ 0.6 × Tj_max
Verify with Testing: Calculated values are estimates. Always validate with thermal measurements on prototypes. Typical accuracy of hand calculations is ±20%.
Consider Transient Behavior: For pulsed loads, thermal capacitance matters. Short pulses don't penetrate deeply into the heatsink, so transient junction temperature can be calculated using thermal impedance curves from device datasheets.
Free Resource: Download our Thermal Design Checklist for a comprehensive 8-page guide to thermal design best practices.